74LV541D,118

Specifications

Package Height

2.45(Max)

Package Width

7.6(Max)

Eccn Us

EAR99

Supplier Package

SO

Maximum High Level Output Current Ma

-8

Number Of Output Enables Per Chip

2 Low

Input Signal Type

Single-Ended

Logic Family

LV

Maximum Operating Temperature C

125

Maximum Low Level Output Current Ma

8

Package Length

13(Max)

Propagation Delay Test Condition Pf

50

Tolerant Ios V

5 Inputs

Parça Durumu

Obsolete

Bus Hold

No

Number Of Inputs Per Chip

8

Minimum Operating Supply Voltage V

1

Pcb Changed

20

Ambalaj

Tape and Reel

Maximum Operating Supply Voltage V

3.6

Typical Operating Supply Voltage V

3.3

Pin Sayısı

20

RoHS Durumu

Supplier Unconfirmed

Number Of Elements Per Chip

1

Number Of Input Enables Per Chip

0

Logic Function

Buffer/Line Driver

Maximum Quiescent Current Ua

160

Çıkış Tipi

3-State

Maximum Power Dissipation Mw

500

Maximum Propagation Delay Time Maximum Cl Ns

60(Typ)@1.2V|20(Typ)@2V|11(Typ)@3.3V|15(Typ)@2.7V

Mounting

Surface Mount

Number Of Outputs Per Chip

8

Minimum Operating Temperature C

-40

Process Technology

CMOS

Polarity

Non-Inverting

Absolute Propagation Delay Time Ns

78

Number Of Channels Per Chip

8